KIM-1 by Ruud Baltissen DISCLAIMER - All names with a copyright are acknowledged. - Some information is derived by deduction after reading a lot of documents and can be unreliable due to the lack of real proof. - If the reader uses information from this document to write software or build hardware, then it is on his own account. I cannot be held responcible for blowing up your computer, mother-in-law or whatever; it will always be your own fault. - I'm not a sexist, with 'he' and 'him' I also mean 'she' and 'her'. Copyrights - This page may contain material which is not mine. But as Commodore doesn't exist anymore and nobody knows anymore who owns the rights of what, I simply provide it to anyone who is interested. If there is anybody who thinks he owns the rights of the provided material, please inform me and I obey his wishes regarding this material. - So you may copy every bit on this page for NON-commercial use but, regarding the above, I won't take any responsebility. I hope you enjoy it. If you use it, just give me at least some credit like "Stolen from Ruud" :-) What is the KIM-1? The KIM-1 is the first computer developed by Commodore, or better, MOS. MOS was a IC producing factory which Commodore took over to be sure of a constant supply of ICs. Commodore produced calculators before but I don't consider a calculator as a computer because you cannot program it. The KIM-1 'only' has 1152 bytes of RAM, 2048 bytes of ROM and 30 I/O-lines. Some of these lines are used to steer 6 7-segment LED-displays and others are used to read the little hexadecimal keyboard. The manuals state that the KIM-1 can be connected to a serial teletyper/te- leprinter in full duplex mode. The KIM-1 has the capability to adjust automa- tically for a wide variety of data rates. (10 CPS, 15 CPS, 30 CPS etc...) {** Personal note: I think 1 CPS is +/- 10 Baud **} The Kim-1 is originally developed to be connected to these teletypers by means of two current-loop- connections. The used current may be 20 or 60 mA. But I can imagine that nowadays these teletypers are very hard to find. A small manual named "KIM-1 HINTS" gives us a solution in the form of a little circuit which enables you to connect a teletyper with a RS232-interface. I can hear you think: "I don't have a RS232-teletyper either!". But if you are able to read this, you posses a computer capable of emulating one. I'm thinking of programs like PROCOMM or KERMIT for the PC and NOVATERM for the C64. A computer without the possebility to load or store programs is no good at all. The KIM-1 has the ability to load and store programs on papertape and/or cassetterecorder. As papertapereaders/punchers are hard to find as well, I think the average KIM-owner is limited to the recorder. At this moment I'm drawing the SCH and I think this work will be finished in the first week of october. I hope Marko will put this one on FUNET too. The hardware The well known 6502 is the heart of the KIM-1 and doesn't need any further explanation. The 1K of RAM is realised by using eight 6102s. The 6102 is the MOS-equivalent of the 2102 which is a 1K*1 RAM. The 6530 is a different and quit complicated story. This IC contains 64 bytes of RAM, 1024 bytes of ROM, a timer and 16 I/O-lines. The complications are 1) two of the I/O-lines, PB5 and PB6, can be used as a ChipSelect-line and 2) looking at the schematics it seems that both 6530 share the same I/O-area. It took me some hours to puzzle that one out but on the end I found the sentence "Wether the pins are used as chip-selects or peripheral I/O pins is a mask option and must be specified when ordering the part" (source: "Hardware manual" by 'MOS TECHNOLOGY INC.'). This sentence combined with some other facts lead me to the conclusion that the 6530 was available in many configura- tions. This didn't only mean you could configure CS1/PB6 and CS2/PB5 but you also could configure the addresses of the ROM, I/O and timer inside the IC. Using RS0, CS1/PB6 and CS2/PB5 MOS could configure the 6530 in such ways that it was possible to connect eight 6530 parallel of each other without any fear of causing busconflicts. The KIM-1 uses two 6530s and both have the same configuration regarding the pinout: only PB6 is used as a CS-input. But they differ in the internal decoding of the I/O-area. The pinouts +---------------------+ GND -+ 1 40 +- PA1 | | PA0 -+ 2 39 +- PA2 | | CLK2 -+ 3 38 +- PA3 | | RS0 -+ 4 37 +- PA4 | | A9 -+ 5 36 +- PA5 | | A8 -+ 6 35 +- PA6 | | A7 -+ 7 34 +- PA7 | | R/W -+ 8 33 +- DB0 | | A6 -+ 9 32 +- DB1 | | A5 -+ 10 31 +- DB2 | MCS6530 | A4 -+ 11 30 +- DB3 | | A3 -+ 12 29 +- DB4 | | A2 -+ 13 28 +- DB5 | | A1 -+ 14 27 +- DB6 | | A0 -+ 15 26 +- DB7 | | RES -+ 16 25 +- PB0 | | IRQ/PB7 -+ 17 24 +- PB1 | | CS1/PB6 -+ 18 23 +- PB2 | | CS2/PB5 -+ 19 22 +- PB3 | | +5V -+ 20 21 +- PB4 | | +---------------------+ PA0..PA7 = Port A, 8 programmable I/O-lines PB0..PB7 = Port B, 8 programmable I/O-lines DB0..DB7 = Databus A0..A9 = Addressbus CLK2 = Clock of the processor, also known as PHI2 RS0 = a CS-line, generally used to choose between ROM and RAM / I/O R/W = Read/Write-line RES = Reset-line IRQ = Open Collector output, to be conneted with IRQ-input of CPU CS1, CS2 = two other CS-lines The pinout-diagram shows the general overview of the 6530. As you can see PB7 has an extra functionality as well: it can serve as an I/O-line as well as an IRQ-output. In case of the KIM-1, only one PB7 is available to perform as IRQ, the other one is occupied by the 'Tape-hardware'. The registers The 6530 has 16 registers but 4 of them, 8..B, are probably mirrors of 0..3. The first four are involved with the I/O-lines. The other registers allow the user to specify a preset count of up to $FF and a clock divide rate of 1, 8, 64 or 1024 by writing to one of the involved registers. As soon as the write occurs, the timer counts down at the clock frequency diveded by the divide rate. The current timer count may be read at any time. The timer may be programmed to generate an interrupt when the counter counts down past zero. At this moment the divide rate is automatically set to 1 and the counter continues to count down. This gives the user a mean to determine how many clockcycles have past since the counter reached zero. register: R/W: Purpose: 0 X Data Register A 1 X Data Direction Register A 2 X Data Register B 3 X Data Direction Register B 4 0 Count down from value, divide by 1, disable IRQ 1 ??? 5 0 Count down from value, divide by 8, disable IRQ 1 ??? 6 0 Count down from value, divide by 64, disable IRQ 1 Read current countervalue, disable IRQ 7 0 Count down from value, divide by 1024, disable IRQ 1 Read counterstatus, bit7 = 1 means counter past zero 8 X Data Register A (mirror ?) 9 X Data Direction Register A (mirror ?) A X Data Register B (mirror ?) B X Data Direction Register B (mirror ?) C 0 Count down from value, divide by 1, enable IRQ 1 ??? D 0 Count down from value, divide by 8, enable IRQ 1 ??? E 0 Count down from value, divide by 64, enable IRQ 1 Read current countervalue, enable IRQ F 0 Count down from value, divide by 1024, enable IRQ 1 Read counterstatus, bit7 = 1 means counter past zero The Data Direction Registers control wether each line of the related port is an in- or outputline. The Data Registers control which data is to be written to the outputlines of a port or, when read, reflect the status of the in- and outputlines. A closer look at the schematics will reveal that only 8 KB is decoded by a 74145, 4-to-10-multiplexer. This means that the whole configuration is mir- rored another 7 times within the 64 KB boundary. Within the 8 KB-boundary the system looks like this: K0 $0000 - $03FF 1024 bytes of RAM (8*6102) K1 $0400 - $07FF free K2 $0800 - $0BFF free K3 $0C00 - $0FFF free K4 $1000 - $13FF free K5 $1400 - $16FF ??? $1700 - $173F I/O, timer of 6530-003 $1740 - $177F I/O, timer of 6530-002 $1780 - $17BF 64 bytes RAM of 6530-003 $17C0 - $17FF 64 bytes RAM of 6530-002 K6 $1800 - $1BFF 1024 bytes ROM of 6530-003 K7 $1C00 - $1FFF 1024 bytes ROM of 6530-002 k0..k7 = outputline of 74145 Notice the way how the I/O- and RAM-areas are aranged within the area $1400- $16FF. If you study the schematics, you won't find any logic who is taking care of it; this is done inside the 6530. Even if you forget the internal ROM for a moment, it means that you cannot exchange the 6530s with each other like the 6526 CIAs in a C64. As you can see there is one undefined area (not mentioned at all in any manual): $1400 - $16FF. Regarding the fact that the addresses of the registers can be programmed, my fair guess is that this area is free as well. You also can see that each I/O-area is 64 bytes big. This could mean that there are 3 extra mirrors or but my fait guess is that those extra 48 bytes are free as well. All theories only can be confirmed by probing a real KIM-1. All the DOUT-lines (Data OUT) of the RAM-ICs are buffered by a tristate buffer, 74125. The SCH reveals that the RAMs do have a CS-line but as I don't have any data of these ICs, I cannot explain the extra use of these 74125- buffers. The Reset- and NMI-input can be triggered by the user by means of a switch. A 556 takes care of debouncing both switches. The KIM-1 can be switched to the Single Step Mode. The 6502 generates a (H) at the SYNC-output every time it fetches an opcode. This signal is used to generate a NMI. On its turn the NMI-routine interrupts the momentary program and does its job. In this case it means it runs after the executing of every single machinecode. This enables the user to see the contents of several registers, including the flags, after each step checking if they contain the value as he expected them to have. If it is the wrong value then there could be a flaw in his thery, program or even hardware. It is obvious that the part of the KERNEL which contains the NMI-routine has to be masked out. Otherwise every opcode of this routine will trigger the NMI on its turn, causing the 6502 to startup another NMI-routine etc... This is prevented by masking out the upper half of the ROM-area by means of a 7401. This also means we cannot single-step in this area but I only can say that we have to give the programmers of the KIM at least some credit :-) The display and keyboard PA0..PA6, PB1..PB4 and a 74145 are used to decode the keyboard and to activate the display. Outputs 0..2 of the 74145 control the rows of the keyboard. PA0..PA6 read the columns. When a key is pushed, and the right row is probed, then the corresponding input of port A is driven (L). Outputs 4..9 control which one of the six 7-segments-displays will be activated by means of a transistor. PA0..PA6, now functioning in the outputmode, control which segments of that display will light up. Connecting a cassette recorder You can connect a normal cassette recorder to the KIM (ie. NO datasette!). A bit is stored as small beep of a certain frequency. To store a '0' the KIM stores 6 pulses 414 usec (top-top) on tape. To store a '1' it stores 9 pulses of 276 usec. (or ~2415 Hz / ~3650 Hz). The KIM generates the pulses himself. A simple RC-network smoothens the shapes of the pulses a little bit. To read the data the received signal first goes through a Phase-Locked-Loop circuit. This circuit measures the frequency and informs the KIM about it with sending a (L) or (H) to input PB7. Connecting a terminal As mentioned, you can connect a terminal to the KIM with its onboard serial interface. The sourcecode revealed it must be one using 7 bits and no parity. The baudrate is detected by the KIM itself but I can imagine there has to be a lower- and upperlimit to the baudrate it can work with. The serial interface is of the 'current loop' type. This means that not the voltagelevel of a line defines wether a '0' or '1' is transmited (like RS232), but if there is a cur- rent or not flowing through the circuit. 'Current loop' is often used in an industrial environment. The current is used to activate a LED inside an opto- coupler which on its turn addresses the receiving device. The advantage of this system is galvanic discoupling: seen from a electric point of view the devices aren't connected together. Electronic noise in one circuit cannot disturb another circuit. The KIM does not use an optocoupler to detect the current. In this case the current activates a transistor which on its turn activates PA7 via a NAND- gate. This gate can be used to block the input. The originator of a signal has also to supply the current. The KIM does simply use a resistor. A NAND-gate with an open collector output takes care of clo- sing or not closing the circuit. A line from the input takes care of the fact that the NAND only operates when there is no inputsignal. In this way only a half-duplex communication is possible. Unfortunally I found something very confusing. I wrote befor that you theore- tically could connect a RS232-terminal to the KIM. Studying the sourcecode reveals that a startbit is represented by '0' and a stopbit by a '1'. This is the opposite of RS232. I hope I'm wrong. Schematics Available at Sourcecodes of the ROM Available at Complete, but not fully checked so there can be type errors. As the original listings provided little, and even confusing information, I provided my own as well. Building your own KIM-1 Can this be done? I think: YES! Why build such an old computer? Ask the guys who still fly in those WW1-planes: because it's fun!. Enough talk: read the document . Credits - Jan Beijer for lending me the manuals. You can reach me at: rbaltiss@worldaccess.nl