The CRT chip 6545 in the PET : ============================== (For a German version see "pet_crt_6545.ger") I found informations about the CRT chip 6545 used in the PET in "ftp.funet.fi/pub/cbm/firmware/pet/petio.doc", but unfortunately it was inexact and buggy: PETIO.DOC says that 80 column models clock the chip at 2 MHz. This is wrong, and there is the reason for the secret, why register R1 (number of characters displayed) is set to 40 on all models, 40 or 80 column (only the programm CBM4032V2.1 50HZ sets R1 to 20, to display 40 columns on a 80 column model, see below). Actually, at pin 21 (CLK) of the CRT, only a clock of 1 MHz can be measured, but 2 characters per usec are produced ! I have no schematic diagram, but I think, there is only one logical explanation: while the CRT generates an address for 1 character to the screen RAM during 1 usec, 2 characters are read from the RAM, one after the other, distinguished by an additional address line, not controlled by the CRT. The 2 values from the RAM are passed to the character ROM as addresses, from where the character values are pushed through the shift register one after the other. So the doubling of the number of columns is only done by external hardware, not by programing the CRT ! Now the registers: the description in PETIO.DOC is not always easy to understand, and parts are wrong. In addition to another source, a copied page form the book "Mikrocomputer Hard- und Software-Praxis" by R.D. Klein, I took inspirations by mesurements, experiments and the fact, that only with the meaning of the registers described in the following, the values from the different PET ROMs lead to reasonable results: R0: (8 Bit) determines the duration of the whole line signal from one hsync pulse to the next, and thereby the horizontal frequency. The time for the horizontal signal is calculated as: t(H) = (+1) * t(CLK) , i.e. on the 8032 with 1 MHz : t(H) = (+1) usec , and the horizontal frequency is : f(H) = 1 / t(H) = 1000 / (+1) kHz R1: (8 Bit) number of characters displayed per line (in the 80 column model 1/2 number of the characters really displayed, i.e. on the 8032 always 40, as mentioned) R2: (8 Bit) position of the hsync-pulse, relative to the start of a line (in characters, i.e. in CLK-cycles, i.e. on the 8032 in usec). Changing leads to hor. shift of the lines. Must be less than R0. R3: (4Bit) width of the hsync-pulse (in characters) (wrong in PETIO.DOC !) R4: (7 Bit) duration of screen refresh from one vsync pulse to the next (rough, in character lines !! The duration of one character line depends on R9). Number of character lines = +1 ! R5: (5 Bit) additonal scan lines (!!) for fine tuning of the screen refresh rate. R6: (7 Bit) Number of character lines displayed per screen (on the 8032 always 25) R7: (7 Bit) position of vsync-pulse, relative to the start of a screen (in character lines). Changing leads to vert. shift of the lines. Must be less than R4. R9: (5 Bit) Height of a character line (in scan lines). For each character line, +1 scan lines (horizontal pulses) are generated. This results in the calculation of the time to create one screen: t(V) = ((+1) * (+1) + ) * t(H) , i.e. on the 8032: t(V) = ((+1) * (+1) + ) * (+1) usec , and the vertical frequency is: f(V) = 1 / t(V) = 1000000 / (((+1) * (+1) + ) * (+1)) Hz The values of some ROMs from "ftp.funet.fi/pub/CBM/firmware/pet/pet/": petedit-4-40-n-60Hz : vert. 60 Hz / hor. 20 kHz, table at $E7B1 petedit-4-40-n-50Hz-reconstruc : vert. 50 Hz / hor. 20 kHz, table at $E7B1 petedit-4-80-b-60Hz : vert. 60 Hz / hor. 20 kHz, table at $E72A petedit-4-80-b-50Hz : vert. 50 Hz / hor. 19,61 kHz (!!), table at $E72A (In "README", Olaf 'Rhialto' Seibert wrote that this is same as the ROM 901474-04 (in 8032sk, 8296). Correct, except the values for the CRT registers:) ROM 901474-04 (from my 8296): vert. 50 Hz / hor. 20 kHz, table at $E72A (These are also the values in the listing "petdis" that also seems to be disassembled from a ROM 901474-04, EPROM (from my patched 8296-D): vert. 50 Hz / hor. 16,95 kHz, table at $E72A (I don't know, if these are original values, or if there could be another monitor put on top, perhaps from a 7x0 or other ?!?) The program "CBM4032V2.1 50HZ", found in the .LHA archives in "ftp.funet.fi/pub/cbm/pet/", that enables running programs for the older PET with 40 characters per line on the newer 80 column PET, uses an own table, that except R1 (# char per line) and R2 (horizontal shift) is equal to the ROM of a PET with 50 Hz vertical and 20 kHz horizontal deflection. Unfortunately this disturbes a PET monitor with other deflection-frequencies. Especially in monitors designed for a lower horizontal freq. (like my 8296-D), the high voltage for the picture tube may increase to unacceptable values, which may damage the monitor !! For that reason I uploaded a patched version "CBM4032 ANY HZ" to "ftp.funet.fi/pub/cbm/incoming", that runs on PET with any frequencies ! The archive "8296d-systemdisk.lha" (also in "ftp.funet.fi/pub/cbm/pet/") contains the program "ADD-ON-LOAD", that loads a ROM image into the additional RAM of a CBM 8296 and starts it there. Here the dependeces of the ROM files found in this archive and those in "ftp.funet.fi/pub/CBM/firmware/pet/pet/" : "BASIC.4.0/80": "petbasic-4-unpatched" + "petedit-4-80-b-60Hz" + "petkernel-4" "BASIC.4.0/80(D)": "petbasic-4" + "petedit-4-80-b-50Hz" + "petkernel-4" "BASIC.4.0/40": "petbasic-4" + "petedit-4-40-b-noCRTC" + "petkernel-4", patched (*) "BASIC.2.0": "petrom-2-b, patched (*) (*): "BASIC.4.0/40" and "BASIC.2.0", which don't know the CRT chip in the original ROM, have a patch, that initializes the CRT to display 40 columns on a 80 columns PET (like the programm "CBM4032V2.1 50HZ", but for 60 Hz monitors). ------------------------------------------------------------------------ Wolfgang Guenther, September '97 woll@informatik.uni-bremen.de http://www.informatik.uni-bremen.de/~woll